Semiconductor package with crack-preventing member
US6707167B2 · kind B2 · utility
5Cited by
5References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2001 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Feb 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package with a crack-preventing member is proposed, in which a chip is mounted on a chip carrier by means of an adhesive and is electrically connected to the chip carrier. The crack-preventing member is formed at a proper position on the chip, and generates compression stress on the chip to sufficiently counteract tension stress produced from the chip carrier and adhesive in a molding process. This can effectively prevent the chip from cracking during molding, and thus improve the quality of fabricated products.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.