Method of manufacturing a semiconductor device
US6709979B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2001 |
| Grant date | Mar 23, 2004 |
| Priority date | — |
| Expiry date | Sep 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K3/423
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of implementing an electrolytic polishing process against a wiring-material film by way of preventing excessive polishing or incomplete polishing caused by presence of differential steps locally generated in the objective wiring-material film. The inventive method comprises a step of forming a wiring-material film for burying recessed portions formed on an insulating film formed on a substrate via a plating process; a step of reducing a local differential step generated on the surface of the wiring-material film by way of preserving the wiring material film on the insulating film; and a final step of removing the wiring-material film deposited on the insulating film by way of preserving such wiring-material film deposited, solely inside of the recessed portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.