Test circuit for an analog measurement of bit line signals of ferroelectric memory cells

US6711047B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Michael Jacob · Munich, DE
• Thomas Rohr · Aschheim, DE

Key dates

• Filing date: Jan 22, 2002
• Grant date: Mar 23, 2004
• Expiry date: Mar 5, 2022

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A test circuit is integrated in a ferroelectric memory component in order to make analog measurements of bit line signals of ferroelectric memory cells. The test circuit, when in a test mode, reads out analog signal values for the respective memory content of the cells and feds the analog signal values to a downstream evaluation device. The test circuit is integrated as an analog circuit in the ferroelectric memory component and, in the test mode with non-activated or disconnected sense amplifiers, is configured to output analog bit line signals from the memory component to a point outside the memory component.