Method of forming a trench MOSFET with structure having increased cell density and low gate charge
US6713352B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2002 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Sep 13, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/908
Abstract
A trench MOSFET includes a plurality of trench segments in an upper surface of an epitaxial layer, extending through a second conductivity type region into a first conductivity type epitaxial region, segment at least partially separated from an adjacent segment by a terminating region, and the trench segments defining a plurality of polygonal body regions within the second conductivity type. A first insulating layer at least partially lines each trench and a plurality of first conductive regions are provided within the trench segments adjacent to the first layer. Each of the conductive regions is connected to an adjacent first conductive region by a connecting conductive region, overlying the terminating region, that bridges at least one of the terminating regions and a plurality of first conductivity type source regions are within upper portions of the polygonal body regions and adjacent the trench segments, the source regions positioned outside the terminating regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.