Semiconductor device with data output circuit having slew rate adjustable
US6714461B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2002 |
| Grant date | Mar 30, 2004 |
| Priority date | — |
| Expiry date | Aug 6, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data for switching a slew rate of a data output circuit included in a data input/output circuit between a slew rate in a normal mode and a slow slew rate is stored in a mode register. According to the data stored in mode register, a slew rate setting signal is generated. According to a slew rate switching circuit, the slew rate of the data input/output circuit is switched between a slew rate in the normal mode and a slow slew rate slower than the slew rate in the normal mode. A data output circuit is achieved which occupies a small area, is capable of setting a slew rate slower than the slew rate in a normal mode and outputting data without causing an erroneous operation with a low consumption current even when the slew rate is adjusted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.