Takeo Okamoto
25Patents
13h-index
24Co-inventors
81Inventor score
Filing activity: Sep 21, 1984 → Mar 14, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6721223B2 | Semiconductor memory device | Physics | 81 | Expired |
| US5436848A | Method of and device for transporting semiconductor substrate in semiconductor processing system | Electricity | 80 | Expired |
| US6893171B2 | Substrate treating apparatus | Emerging Cross-Sectional Technologies | 63 | Expired |
| US6512715B2 | Semiconductor memory device operating with low power consumption | Physics | 37 | Expired |
| US6625050B2 | Semiconductor memory device adaptable to various types of packages | Electricity | 28 | Expired |
| US6873563B2 | Semiconductor circuit device adaptable to plurality of types of packages | Electricity | 28 | Expired |
| US5359785A | Substrate transport apparatus | Electricity | 20 | Expired |
| US6731558B2 | Semiconductor device | Physics | 19 | Expired |
| US5308210A | Interface apparatus for transporting substrates between substrate processing apparatus | Emerging Cross-Sectional Technologies | 18 | Expired |
| US6954103B2 | Semiconductor device having internal voltage generated stably | Physics | 17 | Expired |
| US6697296B2 | Clock synchronous semiconductor memory device | Physics | 16 | Expired |
| US6744298B2 | Semiconductor device | Physics | 14 | Expired |
| US6813210B2 | Semiconductor memory device requiring refresh operation | Physics | 14 | Expired |
| US6784718B2 | Semiconductor device adaptable to a plurality of kinds of interfaces | Physics | 13 | Expired |
| US6724223B2 | Semiconductor device used in two systems having different power supply voltages | Electricity | 13 | Expired |
| US6717460B2 | Semiconductor device | Physics | 13 | Expired |
| US6650582B2 | Semiconductor memory device | Physics | 10 | Expired |
| US6714461B2 | Semiconductor device with data output circuit having slew rate adjustable | Physics | 10 | Expired |
| US6552959B2 | Semiconductor memory device operable for both of CAS latencies of one and more than one | Physics | 9 | Expired |
| US4820907A | Controlled furnace heat treatment | Mechanical Engineering; Lighting; Heating | 7 | Expired |
| US6724679B2 | Semiconductor memory device allowing high density structure or high performance | Physics | 7 | Expired |
| US6765838B2 | Refresh control circuitry for refreshing storage data | Physics | 6 | Expired |
| US6775177B2 | Semiconductor memory device switchable to twin memory cell configuration | Physics | 5 | Expired |
| US4869976A | Process for preparing semiconductor layer | Electricity | 3 | Expired |
| US12424264B2 | Stacked memory with a timing adjustment function | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.