Aspect ratio controlled etch selectivity using time modulated DC bias voltage
US6716758B1 · kind B1 · utility
27Cited by
9References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 1999 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Sep 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A modulated bias power etching method for etching a substrate is disclosed. The method alternatively deposits and etches material from a low aspect area of an integrated circuit device to form a static area while etching material from a high aspect area. The modulation pulse period and repetition rate are adjusted to permit deposition at low aspect ratio and very little or no deposition at high aspect ratio during the deposition cycle and to permit etching of the material deposited on the low aspect ratio area and etching of the material in the high aspect ratio area during the etching cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.