High holding voltage ESD protection structure for BiCMOS technology
US6717219B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2002 |
| Grant date | Apr 6, 2004 |
| Priority date | — |
| Expiry date | Apr 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/711
Abstract
In a Bi-CM0S ESD protection structure, the holding voltage is increased by a desired amount by including a NBL of chosen length. The positioning of the NBL may be adjusted to adjust the I-V characteristics of the structure. Dual voltage capabilities may be achieved by providing two laterally spaced p-regions in a n-material and defining a n+ region and a p+ region in each of the p-regions to define I-V characteristics that are similar to those defined by a SCR device in a positive direction, but, in this case, having those characteristics in both directions. Over and above the NBL position being adjusted relative to the p-regions, the two p-regions may vary in doping level, and dimensions to achieve different I-V characteristics for the device in the positive and negative directions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.