Semiconductor constructions, and methods of forming semiconductor constructions
US6720638B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 2003 |
| Grant date | Apr 13, 2004 |
| Priority date | — |
| Expiry date | Jan 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/763
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention includes a semiconductor construction. The construction includes a semiconductive material having a surface and an opening extending through the surface. An electrically insulative liner is along a periphery of the opening. A mass comprising one or more of silicon, germanium, metal, metal silicide and dopant is within a bottom portion of the opening, and only partially fills the opening. The mass has a top surface. An electrically insulative material is within the opening and over the top surface of the mass. The top surface of the mass is at least about 200 Angstroms beneath the surface of the semiconductive material. The invention also includes methods of forming semiconductor constructions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.