Logic circuit for true and complement signal generator
US6724225B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2001 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Jun 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0948
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A MOSFET logic circuit for performing a logic AND operation is presented including three transistors, wherein at least two input signals are provided to the circuit and an output signal indicative of an AND operation performed on a first and second input signal of the at least two input signals is output from the circuit. In another embodiment, a MOSFET true and complement signal generating signal is presented including at least one MOSFET inverter logic circuit, and first and second MOSFET AND logic circuits, wherein each of the first and second AND logic circuits includes three transistors. The true and complement signal generating circuit receives first and second input signals and outputs a true signal and a complement signal indicative of the first input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.