Semiconductor test program debugging apparatus
US6725449B1 · kind B1 · utility
10Cited by
14References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2000 |
| Grant date | Apr 20, 2004 |
| Priority date | — |
| Expiry date | Nov 27, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318307
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor test program debugging apparatus is disclosed to which data concerning a packet input to and output from the packet transfer memory device is supplied, and which extracts a part corresponding to the packet from data input to and output from the memory device with response to a test signal generated by a tester simulator and displays the details of the part.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.