Semiconductor memory including cell(s) with both charge storage layer(s) and control gate laterally surrounding island-like semiconductor layer
US6727544B2 · kind B2 · utility
109Cited by
11References
32Claims
0Family size
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Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Apr 27, 2004 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6891
Abstract
A semiconductor memory comprises: a substrate; and one or more memory cells constituted of at least one island-like semiconductor layer, a charge storage layer and a control gate, the charge storage layer and the control gate being formed to entirely or partially encircle a sidewall of the island-like semiconductor layer, wherein at least one of said one or more memory cells is electrically insulated from the semiconductor substrate and has an insulating film allowing an electric charge to pass at least in a part of a region between the charge storage layer and the island-like semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.