Tetsuo Endoh
111Patents
20h-index
112Co-inventors
93Inventor score
Filing activity: Mar 7, 1990 → Oct 25, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5774397A | Non-volatile semiconductor memory device and method of programming a non-volatile memory cell to a predetermined state | Physics | 622 | Expired |
| US5602789A | Electrically erasable and programmable non-volatile and multi-level memory systemn with write-verify controller | Physics | 195 | Expired |
| US5386422A | Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels | Physics | 168 | Expired |
| US5555204A | Non-volatile semiconductor memory device | Physics | 141 | Expired |
| US5469444A | Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels | Physics | 140 | Expired |
| US5321699A | Electrically erasable and programmable non-volatile memory system with write-verify controller using two reference levels | Physics | 127 | Expired |
| US6727544B2 | Semiconductor memory including cell(s) with both charge storage layer(s) and control gate laterally surrounding island-like semiconductor layer | Electricity | 109 | Expired |
| US5946231A | Non-volatile semiconductor memory device | Physics | 82 | Expired |
| US5523980A | Semiconductor memory device | Physics | 79 | Expired |
| US6014330A | Non-volatile semiconductor memory device | Physics | 75 | Expired |
| US6870215B2 | Semiconductor memory and its production process | Physics | 65 | Expired |
| US6933556B2 | Semiconductor memory with gate at least partially located in recess defined in vertically oriented semiconductor layer | Electricity | 58 | Expired |
| US6188611A | Non-volatile semiconductor memory device | Physics | 48 | Expired |
| US5895949A | Semiconductor device having inversion inducing gate | Electricity | 41 | Expired |
| US5677556A | Semiconductor device having inversion inducing gate | Electricity | 40 | Expired |
| US4996669A | Electrically erasable programmable read-only memory with NAND memory cell structure | Physics | 35 | Expired |
| US5483484A | Electrically erasable programmable read-only memory with an array of one-transistor memory cells | Physics | 26 | Expired |
| US5088060A | Electrically erasable programmable read-only memory with NAND memory cell structure | Physics | 24 | Expired |
| US5355332A | Electrically erasable programmable read-only memory with an array of one-transistor memory cells | Physics | 21 | Expired |
| US5179427A | Non-volatile semiconductor memory device with voltage stabilizing electrode | Physics | 20 | Expired |
| US7135726B2 | Semiconductor memory and its production process | Electricity | 20 | Expired |
| US5323039A | Non-volatile semiconductor memory and method of manufacturing the same | Electricity | 17 | Expired |
| US5824583A | Non-volatile semiconductor memory and method of manufacturing the same | Electricity | 17 | Expired |
| US7141506B2 | Method for evaluating dependence of properties of semiconductor substrate on plane orientation and semiconductor device using the same | Electricity | 11 | Expired |
| US5596523A | Electrically erasable programmable read-only memory with an array of one-transistor memory cells | Physics | 11 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.