Transfer wafer level packaging

US6727576B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Harry Hedler · Germering, DE
• Thorsten Meyer · Regensburg, DE
• Barbara Vasquez · Austin, US

Key dates

• Filing date: Oct 31, 2001
• Grant date: Apr 27, 2004
• Expiry date: Oct 31, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/14
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor structure and a method for forming the semiconductor structure, including a semiconductor chip and a conductive layer disposed over a portion of the chip, the conductive layer having a portion that extends beyond an edge of the chip. The chip includes a device, which can be an integrated circuit or a micro-mechanical device. The structure can also include a front layer extending beyond the edge of the chip, the conductive layer being disposed on the front layer.