FBEOL process for Cu metallizations free from Al-wirebond pads
US6730982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2001 |
| Grant date | May 4, 2004 |
| Priority date | — |
| Expiry date | Jul 12, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19042
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process of making an interconnection structure of Cu FBEOL semiconductor devices that does not rely upon Al-wirebond pads which require additional patterning steps (for Al-via to Cu, Al-pad), including:a) providing a substrate having Cu wires and Cu pads embedded therein;b) selectively depositing a first metallic passivation layer on the top copper surfaces sufficient to prevent Cu oxidation and/or Cu out diffusion;c) depositing a final passivation layer;d) employing lithography and etching of the final passivation layer to cause pad opening of the fuses by exposing the passivated Cu in the bond pad area and in the fuse area; ande) causing additional passivation of open pad and open fuse areas by selective immersion deposition of Au.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.