Gerald Friese
13Patents
6h-index
20Co-inventors
58Inventor score
Filing activity: Jan 17, 2001 → Jul 30, 2008
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6949442B2 | Methods of forming MIM capacitors | Electricity | 101 | Expired |
| US6720212B2 | Method of eliminating back-end rerouting in ball grid array packaging | Electricity | 69 | Expired |
| US6730982B2 | FBEOL process for Cu metallizations free from Al-wirebond pads | Electricity | 40 | Expired |
| US6451664B1 | Method of making a MIM capacitor with self-passivating plates | Electricity | 23 | Expired |
| US6559042B2 | Process for forming fusible links | Electricity | 16 | Expired |
| US6872648B2 | Reduced splattering of unpassivated laser fuses | Electricity | 13 | Expired |
| US6866943B2 | Bond pad structure comprising tungsten or tungsten compound layer on top of metallization level | Emerging Cross-Sectional Technologies | 6 | Expired |
| US6750113B2 | Metal-insulator-metal capacitor in copper | Electricity | 5 | Expired |
| US6960835B2 | Stress-relief layer for semiconductor applications | Electricity | 3 | Expired |
| US7843035B2 | MIM capacitors with catalytic activation layer | Electricity | 1 | Active |
| US7368804B2 | Method and apparatus of stress relief in semiconductor structures | Electricity | 1 | Expired |
| US7436016B2 | MIM capacitor with a cap layer over the conductive plates | Electricity | 1 | Expired |
| US7786007B2 | Method and apparatus of stress relief in semiconductor structures | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.