Method for manufacturing semiconductor integrated circuit device
US6734114B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2002 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Oct 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/681
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A two-type gate process is suitable for forming a gate insulation film partially formed of a high dielectric film, for example, a titanium oxide film (gate insulation film of the internal circuit) having a relative dielectric constant larger than that of silicon nitride on a substrate, and a silicon nitride film is deposited on the titanium oxide film. The silicon nitride film will prevent oxidation of the titanium oxide film when the surface of the substrate is subjected to thermal oxidation in the next process step. Next, the silicon nitride film and the titanium oxide film on the I/0 circuit region are removed, while the silicon nitride film and the titanium oxide film on the internal circuit region remain, and the substrate is subjected to thermal oxidation to form a silicon oxide film as a gate insulation film on the surface of the I/O circuit region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.