Periodic clamping method and apparatus to reduce thermal stress in a wafer
US6734117B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 12, 2002 |
| Grant date | May 11, 2004 |
| Priority date | — |
| Expiry date | Mar 12, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70783
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method and system for reducing displacements of a semiconductor wafer caused by thermal stresses during a fabrication process includes clamping the wafer to the multiple segments of a segmented chuck wherein the segmented chuck is capable of selectively clamping and unclamping regions of the semiconductor wafer, exposing a region of the wafer clamped to a segment of the chuck to an energy source during the fabrication process that causes thermal stress in the clamped region, unclamping the exposed region of the semiconductor wafer from the corresponding segment of the segmented chuck, and reclamping the exposed region of the semiconductor wafer to the segmented chuck as the thermal stresses of the exposed wafer region are relieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.