Method and apparatus for determining availability of a queue which allows random insertion
US6738896B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2000 |
| Grant date | May 18, 2004 |
| Priority date | — |
| Expiry date | Jan 31, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5352
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus to allow program steps in an issue queue to be sent to the execution queue in a non program order provides reduced stall by allowing out of program order steps to be executed as needed resources become available. The method uses a modulus operation to preassign locations in the execution queues, and keep the entries in proper program order. The method employs an additional bit to represent the modules result (valve) and may also utilize a load store number mapping memory to increase execution speed. With such an arrangement a computer system may decrease the lost performance due to waiting for required resource (i.e., memory or bus) availability for the current instruction, by issuing instructions for which the memory or bus resource is available even though the instruction is not the next one in the original program order. Thus the present invention allows memory reference instructions to issue as resources are available.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.