James B. Keller
120Patents
27h-index
81Co-inventors
93Inventor score
Filing activity: Jan 29, 1986 → Feb 4, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6877076B1 | Memory controller with programmable configuration | Physics | 207 | Expired |
| US6625685B1 | Memory controller with programmable configuration | Physics | 153 | Expired |
| US6473849B1 | Implementing locks in a distributed processing system | Physics | 104 | Expired |
| US6950438B1 | System and method for implementing a separate virtual channel for posted requests in a multiprocessor computer system | Electricity | 82 | Expired |
| US6490661B1 | Maintaining cache coherency during a memory read operation in a multiprocessing computer system | Physics | 82 | Expired |
| US6167492A | Circuit and method for maintaining order of memory access requests initiated by devices coupled to a multiprocessor system | Physics | 76 | Expired |
| US6542984B1 | Scheduler capable of issuing and reissuing dependency chains | Physics | 74 | Expired |
| US6721813B2 | Computer system implementing a system and method for tracking the progress of posted write transactions | Physics | 61 | Expired |
| US6385705B1 | Circuit and method for maintaining order of memory access requests initiated by devices in a multiprocessor system | Physics | 58 | Expired |
| US8775757B2 | Trust zone support in system on a chip having security enclave processor | Physics | 55 | Active |
| US6275905A | Messaging scheme to maintain cache coherency and conserve system memory bandwidth during a memory read operation in a multiprocessing computer system | Physics | 54 | Expired |
| US6502185B1 | Pipeline elements which verify predecode information | Physics | 48 | Expired |
| US6631401B1 | Flexible probe/probe response routing for maintaining coherency | Physics | 47 | Expired |
| US6564315B1 | Scheduler which discovers non-speculative nature of an instruction after issuing and reissues the instruction | Physics | 44 | Expired |
| US6633936B1 | Adaptive retry mechanism | Physics | 42 | Expired |
| US6141734A | Method and apparatus for optimizing the performance of LDxL and STxC interlock instructions in the context of a write invalidate protocol | Physics | 39 | Expired |
| US6560694B1 | Double prefix overrides to provide 16-bit operand size in a 32/64 operating mode | Physics | 39 | Expired |
| US6389526B1 | Circuit and method for selectively stalling interrupt requests initiated by devices coupled to a multiprocessor system | Physics | 34 | Expired |
| US6694424B1 | Store load forward predictor training | Physics | 32 | Expired |
| US6622237B1 | Store to load forward predictor training using delta tag | Physics | 32 | Expired |
| US6557048B1 | Computer system implementing a system and method for ordering input/output (IO) memory operations within a coherent portion thereof | Physics | 31 | Expired |
| US6687789B1 | Cache which provides partial tags from non-predicted ways to direct search if way prediction misses | Emerging Cross-Sectional Technologies | 30 | Expired |
| US6745272B2 | System and method of increasing bandwidth for issuing ordered transactions into a distributed communication system | Electricity | 30 | Expired |
| US6370621B1 | Memory cancel response optionally cancelling memory controller's providing of data in response to a read operation | Physics | 30 | Expired |
| US6212493A | Profile directed simulation used to target time-critical crossproducts during random vector testing | Physics | 28 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.