Semiconductor structures and manufacturing methods

US6740555B1 · kind B1 · utility

Assignees

• Infineon Technologies AG · DE
• International Business Machines Corporation · US

Inventors

• Helmut Tews · Poughkeepsie, US
• Alexander Michaelis · Wappingers Falls, US
• Stephan Kudelka · Radeberg, DE
• Uwe Schroeder · Fishkill, US
• Raj Jammy · Wappingers Falls, US
• Ulrike Gruening · Wappingers Falls, US

Key dates

• Filing date: Sep 29, 1999
• Grant date: May 25, 2004
• Expiry date: Sep 29, 2019

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S257/905
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of axis. A trench is formed in a surface of the silicon body, such trench having sidewalls disposed in different crystallographic planes, one of such planes being the <100> crystallographic plane and another one of such planes being the <110> plane. A substantially uniform layer of silicon nitride is formed on the sidewalls. The trench, with the substantially uniform layer of silicon nitride, is subjected to a silicon oxidation environment with sidewalls in the <110> plane being oxidized at a higher rate than sidewalls in the <100> plane producing silicon dioxide on the silicon nitride layer having thickness over the <110> plane greater than over the <100> plane. The silicon dioxide is subjected to an etch to selectively remove silicon dioxide while leaving substantially un-etched silicon nitride to thereby remove portions of the silicon dioxide over the <100> plane and to thereby expose underlying portions of the silicon nitride material while leaving portions of the silicon dioxide over the <110> plane on underlying portions of the silicon nitride material. …