Method for ball grind array chip packages having improved testing and stacking characteristics
US6740983B2 · kind B2 · utility
5Cited by
38References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2002 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | Aug 28, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low-profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned-in and tested in a more efficient and cost-effective manner than prior known BGA or FBGA semiconductor packages. A high-density, low-profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.