Ball grid array chip packages having improved testing and stacking characteristics
US6740984B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2003 |
| Grant date | May 25, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low profile BGA or FBGA semiconductor package is needed.Exemplary BGA or FBGA semiconductor packages generally comprise a substrate having a semiconductor device attached to a selected surface thereof; Burn in and testing of the semiconductor chip may be performed by electrically contacting selected test pads by complementary arranged test probes in lieu of directly contacting and perhaps harming the connective elements. Upon burning in and testing of the semiconductor device, the test pads may be disassociated from the substrate to decrease the foot print of the semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.