Method for forming silicide at source and drain
US6743717B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Mar 26, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
Abstract
A method for forming silicide at source and drain. The method includes providing a semiconductor substrate having an active region and peripheral region, wherein gates with source and drain on two sides are formed in the peripheral region, conformally forming a barrier layer to cover the active region and the peripheral region, forming a mask layer to cover the barrier layer at the active region, removing the barrier layer from the peripheral region; removing the mask layer, forming a metal layer to cover the peripheral region, and subjecting the metal layer to thermal process such that silicon reacts with the metal to form silicide at the source and the drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.