Non-uniform gate/dielectric field effect transistor
US6744101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2001 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Mar 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28211
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A field effect transistor (FET) structure, and method for making the same, which further suppresses short-channel effects based on variations within the gate dielectric itself. The FET structure utilizes non-uniform gate dielectrics to alter the vertical electric field presented along the channel. The thickness and/or dielectric constant of the gate dielectric is varied along the length of the channel to present a vertical electric field which varies in a manner that tends to reduce the short-channel effects and gate capacitances.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.