Non-volatile semiconductor memory device capable of high-speed data reading
US6744672B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2002 |
| Grant date | Jun 1, 2004 |
| Priority date | — |
| Expiry date | Nov 14, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
When a non-volatile memory cell which can store two bits per one memory cell and pass current bidirectionally is used, a bias power source potential is provided also to a bit line BL4 adjacent to two bit lines (BL2 and BL2) passing a sense current BL2 and BL3. Switch units are provided corresponding to each bit line for selectively connect to any one of a ground power source line, read power source line or bias power source line. The current flowing from a sense amplifier circuit to the adjacent bit line BL4 via adjacent memory cell can be reduced, and thus the current in the sense amplifier circuit is stabilized quickly. Accordingly, a non-volatile semiconductor memory device allows high-speed data reading operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.