Plasma etching of dielectric layer with etch profile control
US6746961B2 · kind B2 · utility
34Cited by
18References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 19, 2001 |
| Grant date | Jun 8, 2004 |
| Priority date | — |
| Expiry date | Sep 19, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor manufacturing process wherein high aspect ratio deep openings are plasma etched in a dielectric layer using an etchant gas which includes a fluorocarbon, a sulfur-containing gas, an oxygen-containing gas and an optional carrier gas. The etchant gas can include CxFyHz such as C4F8, SO2, O2 and Ar. The combination of the sulfur-containing gas and the oxygen-containing gas provides profile control of the deep openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.