Method of preventing cracking in optical quality silica layers
US6749893B2 · kind B2 · utility
6Cited by
5References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2002 |
| Grant date | Jun 15, 2004 |
| Priority date | — |
| Expiry date | Apr 8, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12169
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for making an integrated photonic device involves depositing buffer, core and cladding layers on the front side of a wafer. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above 600° C. on the cladding layer to prevent the cracking of the layers as a result of the thermal treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.