CMOS photodiode having reduced dark current and improved light sensitivity and responsivity
US6753202B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2003 |
| Grant date | Jun 22, 2004 |
| Priority date | — |
| Expiry date | May 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/18
Abstract
A method for the fabrication of a light-sensing diode in a high-resistivity semiconductor substrate. A high-energy implant of ions into the substrate is patterned to form an annular well of the same conductivity type as the substrate; followed by a second high-energy implant of the opposite conductivity type, within the center of the annulus; followed by a third implant, of lower energy and high dosage, to form a region of the first conductivity type extending laterally near the substrate surface. The resulting diode junction is thereby patterned to include two planes near the substrate surface, allowing incident light to traverse the junction twice.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.