Methods of increasing write selectivity in an MRAM
US6756240B2 · kind B2 · utility
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13References
9Claims
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Key dates
| Filing date | Jul 7, 2003 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Jul 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field component from the digital line current that extends along the major axis of the magneto-resistive bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.