Apparatus for electrically planarizing semiconductor wafers
US6756307B1 · kind B1 · utility
20Cited by
6References
64Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2002 |
| Grant date | Jun 29, 2004 |
| Priority date | — |
| Expiry date | Jul 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention pertains to apparatus and methods for electroplanarization of metal surfaces having both recessed and raised features, over a large range of feature sizes. The invention accomplishes this by use of a flexible planar cathode and a spacing pad thereon. Methods of the invention are electropolishing methods. During electroplanarization, the flexible planar cathode conforms to the global contour of the work piece (e.g. a wafer) while the spacing pad conforms to local topography of the metal layer being planarized. In this way, dishing is reduced in the final planarized metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.