Integrated circuit metal oxide semiconductor transistor
US6759695B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2003 |
| Grant date | Jul 6, 2004 |
| Priority date | — |
| Expiry date | Sep 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/801
Abstract
An integrated circuit metal oxide semiconductor device comprises a gate region and a dielectric layer positioned therein, wherein the dielectric layer is substantially free of germanium diffused therein from a silicon germanium layer of the device. The method comprises depositing a dummy replacement gate, subjecting the device to high temperature processing, removing the dummy gate, and then depositing a dielectric material and a final gate material within the formed gate region. Because the dielectric material is deposited after high temperature processing of the device, there is negligible diffusion of germanium into the dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.