N-p butting connections on SOI substrates
US6762464B2 · kind B2 · utility
0Cited by
6References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2002 |
| Grant date | Jul 13, 2004 |
| Priority date | — |
| Expiry date | Sep 17, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
Abstract
An SOI connection for connecting source/drain regions of one transistor to source/drain regions of another transistor without the use of overlying metal. The regions abut, and a salicide interconnects the regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.