Circuit component placement
US6768142B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | May 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for designing an input output cell of an integrated circuit. The input output cell has a required area, a width, and a height. The bonding pad pitch length between adjacent bonding pads of the integrated circuit is measured. The width of the input output cell is specified to be substantially equal to the bonding pad pitch length. The required area is divided by the width to determine a first value, and the height of the input output cell is specified to be substantially equal to the first value. In this manner, the width of the input output cells is no greater than the distance between two adjacent bonding pads, and thus the input output cells can be placed very close together, facilitating their use in input output limited integrated circuit designs. However, the height of the input output cells is no greater than is necessary to enclose the required area of the input output cell, thus facilitating their use in core limited integrated circuit designs. In various preferred embodiments, the bonding pads for the input output cells are disposed within their surface areas, thereby further reducing the surface area of the integrated circuit that is required for the input output…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.