Verifying proximity of ground metal to signal traces in an integrated circuit
US6769102B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2002 |
| Grant date | Jul 27, 2004 |
| Priority date | — |
| Expiry date | Nov 20, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are disclosed for verifying the proximity of signal return paths (e.g., ground metal or power) to signal traces in an integrated circuit package design. A package designer creates the package design using a package design tool. A proximity verifier verifies that there is a signal return path within a predetermined threshold distance of each specified signal trace in the package layers directly above and/or below the signal trace. The proximity verifier may notify the package designer of any signal traces which are not sufficiently close to signal return paths, such as by providing visual indications of such signal traces in a graphical representation of the package design. In response, the package designer may modify the package model to ensure that all signal traces are sufficiently close to signal return paths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.