Method and system for using TMAH for staining copper silicon on insulator semiconductor device cross sections
US6770512B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2002 |
| Grant date | Aug 3, 2004 |
| Priority date | — |
| Expiry date | Dec 10, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and system for performing failure analysis on a silicon on insulator (SOI) semiconductor device is disclosed. The SOI device includes a plurality of conductive structures in a silicon region. The silicon resides on a box insulator, which resides on a silicon substrate. The method and system include providing a cross-section of the SOI semiconductor device. The cross-section of the SOI semiconductor device includes a portion of the plurality of conductive structures. The method and system also include staining the cross-section of the SOI semiconductor device using a stain. The stain etches the silicon region in the SOI semiconductor device without etching a remaining portion of the SOI semiconductor device not composed of silicon.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.