Floating gate and method of fabricating the same

US6770520B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Ying-Cheng Chuang · Taoyuan, TW
• Chung-Lin Huang · Taichung, TW
• Chi-Hui Lin · Taipei, TW

Key dates

• Filing date: May 13, 2003
• Grant date: Aug 3, 2004
• Expiry date: May 13, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

A floating gate and fabrication method thereof. A semiconductor substrate is provided, on which a gate dielectric layer, a conducting layer, and a patterned hard mask layer are sequentially formed. The surface of the conducting layer is covered by the patterned hard mask layer to form a gate. The conducting layer is etched to a predetermined depth to form an indentation using the patterned hard mask layer as a mask. The conducting layer is oxidized to form an oxide layer on the surface of the conducting layer. The oxide layer and the conducting layer are etched to form multiple tips using the patterned hard mask layer as a mask.