Apparatus and methods for characterizing floating body effects in SOI devices
US6774395B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 15, 2003 |
| Grant date | Aug 10, 2004 |
| Priority date | — |
| Expiry date | Mar 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are described for characterizing floating body delay effects in SOI wafers comprising providing a pulse edge to a floating body and a tied body chain in the wafer, storing tied body chain data according to one or more of the floating body devices, and characterizing the floating body delay effects according to the stored tied body chain data. Test apparatus are also described comprising a floating body chain including a plurality of series connected floating body inverters or NAND gates fabricated in the wafer and a tied body chain comprising a plurality of series connected tied body devices to in the wafer. Storage devices are coupled with the tied body devices and with one or more of the floating body devices and operate to store tied body chain data from the tied body devices according to one or more signals from floating body chain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.