Self-test for leakage current of driver/receiver stages

US6774656B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Ulrich Baur · Holzgerlingen, DE
• Otto A. Torreiter · Echterdingen, DE
• Joseph Eckelman · Hopewell Junction, US
• David Hui · Taipei, TW

Key dates

• Filing date: Nov 1, 2001
• Grant date: Aug 10, 2004
• Expiry date: Jun 1, 2022

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31712
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

The present invention relates to a test for current leakage of driver/receiver stages, and in particular for bi-directional input/output stages (10) of a semiconductor chip. Two dedicated support transistor devices (56, 58) are added into the prior art switching scheme, together with a simple control logic (48, 50, 52, 60, 62, 64) for selectively controlling the two dedicated support transistor devices according to a predetermined test scheme. An on-chip self-test feature provides valid voltage levels which are convertible by the receiver (24) to predictable logic states at the evaluation line RDATA. The test can be performed autonomously on the chip without the requirement for an external test device.