Semiconductor integrated circuit device and manufacturing method thereof
US6777279B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 14, 2003 |
| Grant date | Aug 17, 2004 |
| Priority date | — |
| Expiry date | Apr 14, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
Abstract
Disclosed are a semiconductor integrated circuit device and a method of manufacturing the same capable of realizing the two-level gate insulator process for the DRAM without increasing the number of manufacturing steps and that of photomasks. After forming a gate electrode of a MISFET which constitutes a memory cell in a memory array region on a semiconductor substrate, the substrate is subjected to thermal treatment (re-oxidation process). At this time, since bird's beak of the thick gate insulating film formed below the sidewall portion of the gate electrode penetrates into the center of the gate electrode, a gate insulating film thicker than the gate insulating film before the re-oxidation process is formed just below the center of the gate electrode. Meanwhile, since the gate electrode in the peripheral circuit region has a gate length longer than that of the gate electrode in the memory array region, the thickness of the gate insulating film just below the center thereof is almost equal to that before the re-oxidation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.