Patent · US Expired

NROM memory circuit with recessed bitline

US6777725B2 · kind B2 · utility

79Cited by
6References
40Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 14, 2002
Grant dateAug 17, 2004
Priority date
Expiry dateJun 14, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B69/00

Abstract

An integrated memory circuit of the type of an NROM memory includes recessed bit lines formed of a material having a low ohmic resistance. By recessing the bit lines with respect to the semiconductor substrate surface of a peripheral controlling circuit for an array of memory cells allows to form the word line lithography on a perfect or almost perfect plane so that the word line formation results in a production with higher yield and, therefore, lower costs for the individual integrated memory circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.