Method for fabricating a nitrided silicon-oxide gate dielectric
US6780720B2 · kind B2 · utility
18Cited by
26References
22Claims
0Family size
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Key dates
| Filing date | Jul 1, 2002 |
| Grant date | Aug 24, 2004 |
| Priority date | — |
| Expiry date | Jul 1, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28185
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a gate dielectric layer. The method comprises: providing a substrate; forming a silicon dioxide layer on a top surface of the substrate; exposing the silicon dioxide layer to a plasma nitridation to convert the silicon dioxide layer into a silicon oxynitride layer; and performing a spiked rapid thermal anneal of the silicon oxynitride layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.