Patent · US Expired

Method for operating a semiconductor memory and semiconductor memory

US6781889B2 · kind B2 · utility

7Cited by

5References

16Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jorg Kliewer · Birkenfeld, DE
Rupert Lukas · Birkenfeld, DE
Manfred Proll · Dorfen, DE
Stephan Schröder · Birkenfeld, DE

Key dates

Filing date	Sep 19, 2002
Grant date	Aug 24, 2004
Priority date	—
Expiry date	Sep 22, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/2602
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An additional test mode is introduced in a semiconductor memory. A multiplicity of word lines are simultaneously activated by a word line decoder in the test mode. After a potential equalization of complementary bit lines, a logic “0” or a logic “1” is applied to an equalization circuit via a voltage generator. It is thus possible for the entire memory cell array to be preallocated an identical data value or, in strip form, alternating data values. Test time is thereby saved.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.