Bi-directional ESD protection structure for BiCMOS technology

US6784029B1 · kind B1 · utility

Assignee

• NATIONAL SEMICONDUCTOR CORPORATION · US

Inventors

• Vladislav Vashchenko · Palo Alto, US
• Ann Concannon · San Jose, US
• Peter J. Hopper · San Jose, US
• Marcel ter Beek · Pleasanton, US

Key dates

• Filing date: Apr 12, 2002
• Grant date: Aug 31, 2004
• Expiry date: Apr 12, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/401

Abstract

In a Bi-CMOS ESD protection device, dual voltage capabilities are achieved by providing two laterally spaced p-regions in a n-material and defining a n+ region and a p+ region in each of the p-regions to define I-V characteristics that are similar to those defined by a SCR device in a positive direction, but, in this case, having those characteristics in both directions. The device may be asymmetrical to accommodate different voltage amplitudes in the positive and negative directions.