Method for fabricating semiconductor device
US6784051B2 · kind B2 · utility
5Cited by
1References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2002 |
| Grant date | Aug 31, 2004 |
| Priority date | — |
| Expiry date | Dec 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/48
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for fabricating a semiconductor device capable of preventing a pattern at an edge area of a wafer from being lifted and acting as a particle source. The present invention includes the steps of: preparing a wafer having a first area and a second area, wherein the first area has lower topology than the second area; forming a target layer on the wafer; and patterning the target layer through a photolithography process so to form a number of first patterns in a line shape at the second area and to form a number of second patterns in a closed loop shape at the first area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.