Nonvolatile semiconductor memory cell and associated semiconductor circuit configuration and method for the fabrication of the circuit configuration

US6787843B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventor

• Georg Tempel · Zorneding, DE

Key dates

• Filing date: Jun 16, 2003
• Grant date: Sep 7, 2004
• Expiry date: Jun 16, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

A nonvolatile semiconductor memory cell, an associated semiconductor circuit configuration and also a fabrication method, in which, in a substrate, active regions are formed with a first insulating layer situated above them, a charge-storing layer, a second insulating layer and a control layer. In order to realize a particularly small cell area, in a third insulating layer situated thereabove, openings are formed above at least partial regions of source/drain regions, which are each directly contact-connected via the openings by source and drain lines formed on an insulating web.