Test key for detecting overlap between active area and deep trench capacitor of a DRAM and detection method thereof
US6788598B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2003 |
| Grant date | Sep 7, 2004 |
| Priority date | — |
| Expiry date | May 30, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test key disposed on a scribe line of a wafer. The test key includes: two active areas disposed on the substrate; two first deep trench capacitors disposed on the substrate outside the two active areas; a rectangular active word line disposed on the substrate covering the first deep trench capacitors and the active areas; first and second passing word lines disposed on one side of the rectangular active word line and across the parallel active areas; a third passing word line disposed on another side of the rectangular active word line and across another end of the two active areas; two second deep trench capacitors disposed on the substrate under where the two first passing word lines overlap the two active areas; and four contacts disposed on the first active areas between the first and second word lines and between the third and the rectangular active word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.