FinFET device incorporating strained silicon in the channel region
US6800910B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2002 |
| Grant date | Oct 5, 2004 |
| Priority date | — |
| Expiry date | Dec 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/751
Abstract
A FinFET device employs strained silicon to enhance carrier mobility. In one method, a FinFET body is patterned from a layer of silicon germanium (SiGe) that overlies a dielectric layer. An epitaxial layer of silicon is then formed on the silicon germanium FinFET body. A strain is induced in the epitaxial silicon as a result of the different dimensionalities of intrinsic silicon and of the silicon germanium crystal lattice that serves as the template on which the epitaxial silicon is grown. Strained silicon has an increased carrier mobility compared to relaxed silicon, and as a result the epitaxial strained silicon provides increased carrier mobility in the FinFET. A higher driving current can therefore be realized in a FinFET employing a strained silicon channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.