Bond wire tuning of RF power transistors and amplifiers
US6806106B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2001 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Mar 20, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a power transistor circuit includes securing a die to a substrate, the die comprising a transistor having an input terminal and an output terminal. One or more performance characteristics of the transistor are measured. Using one or more wire sets, the transistor input terminal is electrically connected to one or more input matching elements and an input signal lead. The impedance of the one or more wire sets, as determined by selecting a desired number and/or length of the wires in each set, is selected based at least in part on the measured transistor performance characteristic(s). Similarly, using one or more additional wire sets, the transistor output terminal is electrically connected to one or more output matching elements and an output signal lead, wherein the impedance of the additional wire sets is selected based at least in part on the measured transistor performance characteristic(s).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.