Circuit configuration for driving a programmable link
US6807123B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 2003 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Jun 20, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit configuration for driving a programmable link has a volatile memory cell, which is coupled to the fuse for the permanent storage of data stored in the volatile memory, and also a shift register, which enables data to be read out from the volatile memory cell and data to be written to the memory cell. In this case, a plurality of shift registers may be interconnected to form a shift register chain for the purpose of driving a plurality of fuses. The shift register chain thus enables fast writing and reading to/from the volatile memory with a low outlay on circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.